How Long to Read Logic Minimization Algorithms for VLSI Synthesis

How Long Does it Take to Read Logic Minimization Algorithms for VLSI Synthesis?

It takes the average reader 3 hours and 17 minutes to read Logic Minimization Algorithms for VLSI Synthesis by Robert K. Brayton

Assuming a reading speed of 250 words per minute. Learn more

Description

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.

How long is Logic Minimization Algorithms for VLSI Synthesis?

Logic Minimization Algorithms for VLSI Synthesis by Robert K. Brayton is 194 pages long, and a total of 49,276 words.

This makes it 65% the length of the average book. It also has 60% more words than the average book.

How Long Does it Take to Read Logic Minimization Algorithms for VLSI Synthesis Aloud?

The average oral reading speed is 183 words per minute. This means it takes 4 hours and 29 minutes to read Logic Minimization Algorithms for VLSI Synthesis aloud.

What Reading Level is Logic Minimization Algorithms for VLSI Synthesis?

Logic Minimization Algorithms for VLSI Synthesis is suitable for students ages 10 and up.

Note that there may be other factors that effect this rating besides length that are not factored in on this page. This may include things like complex language or sensitive topics not suitable for students of certain ages.

When deciding what to show young students always use your best judgement and consult a professional.

Where Can I Buy Logic Minimization Algorithms for VLSI Synthesis?

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